New Era in Campus Chip Design

Government of India has broadened access to advanced semiconductor design by enabling universities across the country to use industry-grade Electronic Design Automation tools and Multi-Project Wafer fabrication services under the Chips to Start-up Programme. At a handover event at Semiconductor Laboratory, Mohali saw 28 chips—comprising 600 bare dies and 600 packaged units—designed by students from 17 institutions returned to their teams. Officials confirmed that 122 design tape-outs from 46 institutions were processed over the past year through five MPW shuttles, with over 175 lakh hours of EDA usage logged by more than 380 academic and research organisations via the ChipIN Centre.

Union Minister for Electronics & Information Technology, Railways and Information & Broadcasting, Ashwini Vaishnaw, described the effort as a transformation of India’s semiconductor landscape, arguing the shift empowers students and researchers to work with the same tools global chipmakers use and turns campuses into active nodes of chip innovation and design. SCL and ChipIN’s collaboration enables institutions to prototype, validate and manufacture chips under one integrated workflow—from design to wafer fabrication and packaging.

Analysts note that this initiative addresses previous barriers faced by academic institutions seeking to explore integrated circuit design, where lack of access to expensive EDA licences and manufacturing services often made projects unviable. By providing a centralised national facility, the government is effectively building a talent pipeline and offering practical exposure to chip fabrication, potentially reducing India’s reliance on foreign design and fabrication services over time.

The rollout comes against the backdrop of a wider push to develop domestic semiconductor manufacturing capabilities. Plans to upgrade SCL with an injection of ₹4,500 crore aim to expand fabrication capacity nearly hundred-fold and advance manufacturing to smaller nodes, reinforcing the analog and digital production backbone that the academic chip designs will feed into. Combining design empowerment with fabrication capacity creates a rare integrated ecosystem where chip concept can travel from whiteboard to silicone within the country.

Start-ups too are benefitting: institutions under C2S and ChipIN aren’t limited to student projects but include over 90 young companies. These entities logged about 50 lakh hours of EDA use, indicating that the programme serves both academic and commercial ambitions. Sector analysts suggest that with incentives under the broader India Semiconductor Mission—including design-linked and deployment-linked incentives—this could accelerate design work in fields such as 5G, electric vehicles, AI, industrial automation and defence electronics.